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Computer Organization and Architecture Objective Questions set-5

0

1. Memory unit that communicates directly with the CPU is called the ...............

A) Main memory
Computer Organization and Architecture
RISC (Photo credit: Wikipedia)

B) Secondary memory

C) Auxiliary memory

D) Register



2. CISC stands for ................

A) Common Instruction Set Computers

B) Complex Instruction Set Compilers

C) Complex Instruction Set Computers

D) Compound Instruction Set Computers



3. The communication between central system and the outside environment is done by

A) Input-output subsystem

B) Control system

C) Memory system

D) Logic system



4. The register that keeps track of the instructions in the program stored in memory is ..

A) Control register

B) Program counter

C) Status register

D) Direct register



5. ................ is a small very speed register file maintained by the instruction fetch segment of the pipeline.

A) Branch Target Buffer

B) Loop buffer

C) Branch loop buffer

D) Target register



6. In case of only one memory operand, when a second operand is needed, as in the case of an Add instruction, we use processor register called .........

A) accumulator

B) register

C) operand

D) source



7. Data transfer between the main memory and the CPU register takes place through two registers namely .......

A) general purpose register and MDR

B) accumulator and program counter

C) MAR and MDR

D) MAR and Accumulator



8. The pipeline operates on a stream of instruction by overlapping the phases of instruction cycle is ........

A) Arithmetic pipeline

B) Instruction pipeline

C) Parallel pipeline

D) Multiple pipeline



9. The instruction that cause transfer of data from one location to another without changing the binary information content are ...

A) Data transfer instruction

B) Data manipulation instruction

C) Register transfer instruction

D) Program control instruction



10. The branch logic that provides decision making capabilities in the control unit is known as ..

A) Controlled transfer

B) Conditional transfer

C) Unconditional transfer

D) None of above




Answers:



1. Memory unit that communicates directly with the CPU is called the ...............

A) Main memory

2. CISC stands for ................

C) Complex Instruction Set Computers

3. The communication between central system and the outside environment is done by

A) Input-output subsystem

4. The register that keeps track of the instructions in the program stored in memory is ..

B) Program counter

5. ................ is a small very speed register file maintained by the instruction fetch segment of the pipeline.

B) Loop buffer

6. In case of only one memory operand, when a second operand is needed, as in the case of an Add instruction, we use processor register called .........

A) accumulator

7. Data transfer between the main memory and the CPU register takes place through two registers namely .......

C) MAR and MDR

8. The pipeline operates on a stream of instruction by overlapping the phases of instruction cycle is ........

B) Instruction pipeline

9. The instruction that cause transfer of data from one location to another without changing the binary information content are ...

A) Data transfer instruction

10. The branch logic that provides decision making capabilities in the control unit is known as ..

C) Unconditional transfer




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Computer Organization and Architecture Interview Questions set-4

0

1. The computer code for the interchange of information between terminal is ..

A) ASCII
Computer Organization and Architecture Interview Questions
Example of how to construct a NAND gate from NOR gates (Photo credit: Wikipedia)

B) BCD

C) EBCDIC

D) All of the above



2. SIMD stands for ....

A) Single Instruction Stream Over Multiple Data Streams

B) Single Instruction Stream Over Minimum Data Streams

C) Single Instruction Stream Over Media Data Streams

D) Multiple Instruction Streams and Single Data Stream



3. The NOR gate is complement of ..

A) AND gate

B) OR gate

C) NAND gate

D) NOT gate



4. A .............. is a digital circuit that performs the inverse operation of decodes.

A) multiplexer

B) adder

C) subtractor

D) encoder



5. Pipelining increases the CPU instruction ..........

A) efficiency

B) latency

C) throughput

D) Both a and c




6. The ............... is a program whose function is to start the computer software operating when power is turned on.

A) Bootstrap loader

B) Multi programming

C) Loader

D) None of the above



7. .................. is concerned with the way the hardware components operate to form computer system.

A) Computer organization

B) Computer design

C) Computer architecture

D) Computer implementation



8. Devices that are used primarily to transport data between the processor and the user are known as ....

A) Networking devices

B) Basic storage devices

C) Data presentation device

D) Data transfer device



9. Which statement is valid about computer program?

A) It is understood by a computer

B) It is understood by programmer

C) It is understood to use

D) All of the above



10. Access time is

A) Time to position the head over proper track

B) Time to position the head over proper sector

C) Time to position the head over proper cylinder

D) None of above





Answers:



1. The computer code for the interchange of information between terminal is ..

A) ASCII

2. SIMD stands for ....

A) Single Instruction Stream Over Multiple Data Streams


3. The NOR gate is complement of ..

B) OR gate

4. A .............. is a digital circuit that performs the inverse operation of decodes.

D) encoder

5. Pipelining increases the CPU instruction ..........

C) throughput

6. The ............... is a program whose function is to start the computer software operating when power is turned on.

A) Bootstrap loader

7. .................. is concerned with the way the hardware components operate to form computer system.

A) Computer organization

8. Devices that are used primarily to transport data between the processor and the user are known as ....

C) Data presentation device

9. Which statement is valid about computer program?

D) All of the above

10. Access time is

A) Time to position the head over proper track



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MCQ of Computer Organization and Architecture with Answer set-3

0

1. An exception condition in a computer system caused by an event external to the CPU is called ........

A) Interrupt

B) Halt

C) Wait

D) Process



2. When the CPU detects an interrupt, it then saves its .............

A) Previous State

B) Next State

C) Current State

D) Both A and B
English: A photo of three 32-bit PCI slots.
English: A photo of three 32-bit PCI slots. (Photo credit: Wikipedia)



3. A microprogram is sequencer perform the operation...

A) read

B) write

C) read and write

D) read and execute



4. A computer program that converts an entire program into machine language at one time is called

A) interpreter

B) simulator

C) compiler

D) commander



5. The unit which decodes and translates each instruction and generates the necessary enable signals for ALU and other units is called ..

A) arithmetic unit

B) logical unit

C) control unit

D) CPU



6. State whether the following statement is True or False for cache memory.

i) Cache memories are high-speed buffers which are inserted between the processors and main memory.

ii) They can also be inserted between main memory and mass storage.

iii) It can be used as secondary memory.

A) i- True, ii- False, iii-True

B) i- False, ii- True, iii-True

C) i-True, ii-True, iii-False

D) i- False, ii- False, iii-True



7. The channel which handles the multiple requests and multiplexes the data transfers from these devices a byte at a time is known as .....

A) multiplexor channel

B) the selector channel

C) block multiplex channel

D) both A and C



8. The address mapping is done, when the program is initially loaded is called ......

A) dynamic relocation

B) relocation

C) static relocation

D) dynamic as well as static relocation



9. State whether the following statement is True or False for PCI bus.

i) The PCI bus tuns at 33 MHZ and can transfer 32-bits of data(four bytes) every clock tick.

ii) The PCI interface chip may support the video adapter, the EIDE disk controller chip and may be two external adapter cards.

iii) PCI bus deliver the different throughout only on a 32-bit interface that other parts of the machine deliver through a 64-bit path.

A) i- True, ii- False, iii-True

B) i- False, ii- True, iii-True

C) i-True, ii-True, iii-False

D) i- False, ii- False, iii-True



10. The I/O processor has a direct access to ....................... and contains a number of independent data channels.

A) main memory

B) secondary memory

C) cache

D) flash memory

Answers:

1.   A) Interrupt
2.   C) Current State
3.   D) read and execute
4.   C) compiler
5.   C) control unit
6.   C) i-True, ii-True, iii-False
7.   A) multiplexor channel
8.   C) static relocation
9.   C) i-True, ii-True, iii-False
10. A) main memory


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Solved MCQ of Computer Organization and Architecture set-2

0

1. The time that elapses between the initiation of an operation and completion of that operation is called.....

A) throughput

B) memory response time

C) memory access time

D) execution time


2. Interrupts which are initiated by an instruction are ............

A) internal

B) external

C) hardware

D) software


3. A semiconductor memory constructed using bipolar transistors or MOS transistor stores information in the form of a ......................

A) Flip-flop voltage levels

B) bit

C) byte

D) opcodes values


4. A simple way of performing I/O tasks is to use a method known as ......................

A) program-controlled I/O

B) program-controlled input

C) program-controlled output

D) I/O operation


5. Memory access in RISC architecture is limited to instructions ........

A) CALL and RET

B) PUSH and POP

C) STA and LDA

D) MOV and JMP


6. Striking key stores the corresponding character code in a 8-bit buffer register associated with the keyboard. This register is called as ........................

A) DATAINOUT

B) DATAOUT

C) DATAIN

D) Both A and B


7. When the character is transferred to the processor, status control flag SIN is automatically cleared to ............................

A) zero

B) one

C) two

D) yes


8. A microprogram written as string of 0's and 1's is a ...

A) symbolic micro-instruction

B) binary micro-instruction

C) symbolic micro-instruction

D) binary microprogram


9. An exception conditions in a computer system by an event external to the CPU is called .........

A) Interrupt

B) halt

C) wait

D) process


10. When the CPU detects an interrupt, it then saves its ...................

A) Previous state

B) Next state

C) Current state

D) Both A and B

 

Answers:

1.  C) memory access time
2.  B) external
3.  A) Flip-flop voltage levels
4.  A) program-controlled I/O
5.  C) STA and LDA
6.  C) DATAIN
7.  A) zero
8.  D) binary microprogram
9   A) Interrupt.
10 C) Current state.

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Solved MCQ of Computer Organization and Architecture set-1

0


1. A collection of lines that connects several devices is called ..............

A) bus

B) peripheral connection wires

C) Both a and b

D) internal wires



2. A complete microcomputer system consist of ...........

A) microprocessor

B) memory

C) peripheral equipment

D) all of the above



3. PC Program Counter is also called ...................

A) instruction pointer

B) memory pointer

C) data counter

D) file pointer



4. In a single byte how many bits will be there?

A) 8

B) 16

C) 4

D) 32



5. CPU does not perform the operation ..................

A) data transfer

B) logic operation

C) arithmetic operation

D) all of the above



6. The access time of memory is ............... the time required for performing any single CPU operation.

A) Longer than

B) Shorter than

C) Negligible than

D) Same as



7. Memory address refers to the successive memory words and the machine is called as ............

A) word addressable

B) byte addressable

C) bit addressable

D) Terra byte addressable



8. A microprogram written as string of 0's and 1's is a .............

A) Symbolic microinstruction

B) binary microinstruction

C) symbolic microinstruction

D) binary micro-program



9. A pipeline is like ....................

A) an automobile assembly line

B) house pipeline

C) both a and b

D) a gas line



10. Data hazards occur when .....................

A) Greater performance loss

B) Pipeline changes the order of read/write access to operands

C) Some functional unit is not fully pipelined

D) Machine size is limited



Answers:



1. A) bus

2. D) all of the above

3. A) instruction pointer

4. A) 8

5. A) data transfer

6. A) Longer than

7. A) word addressable

8. D) binary microprogram

9. A) an automobile assembly line

10. B) Pipeline changes the order of read/write access to operands


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